SAMPLE AND HOLD

SAMPLE AND HOLD

Sample and hold circuits samples an input signal and holds on to its last sampled value until the input is sampled again.

n-channel E-MOSFET - It works as a switch that is controlled by the control voltage V_c.

Capacitor - Used to store charge

V_in - input voltage (sine wave, frequency f)

V_c  - sample and hold control voltage( pulse, frequency >= 2f)

Op-amp - 741 IC, Voltage follower

Circuit Operation

The analog signal V_in ie, the signal to be sampled is applied to the drain and sample and hold control voltage V_c is applied to the gate of the E-MOSFET.

When V_c is positive, the E-MOSFET conducts and acts as a closed switch. This allows input voltage to charge capacitor, ie the input voltage appears across C.

When V_c is zero, the E-MOSFET is OFF and acts as open switch. Therefore the only discharge path for C is through op-amp, but the high impedance of op-amp voltage follower does not allow capacitor to discharge through it. The capacitor holds the voltage across it.

The time period T_S of sample and hold control voltage V_c during which the voltage across the capacitor is equal to the input voltage are called sample periods.

The time periods T_H of V_c during which the voltage across the capacitor is constant are called hold periods.